The present invention generally relates to semiconductor devices, and more specifically, to a semiconductor substrate having transistors with different threshold voltage values.
A system-on-chip (SOC) application may require various sets of transistors to achieve a balance between power and performance. Devices having varying threshold voltages Vt may be needed in an SOC application to meet different performance and power requirements. The threshold voltage Vt is a function of a number of parameters including channel length, gate material, gate insulation material and thickness, and the channel doping concentration.
In silicon-on-insulator (SOI) fabrication technology, transistors are built on a relatively thin silicon layer (or any other semiconducting material). The silicon layer rests on an insulating layer, usually constructed of silicon dioxide (SiO2), and may be referred to as a buried oxide or BOX. Extremely thin SOI (ETSOI) devices generally have a silicon layer (also referred to as an ETSOI layer) with a thickness that is usually about 20 nanometers (nm) or less. Due to the limited thickness of the ETSOI layer, channel doping is generally less effective in ETSOI devices. However, the threshold voltage Vt is dependent on the level of channel doping concentration. In one alternative approach to doping, an ETSOI application with transistors having varying threshold voltages Vt may be created by using different gate stack structures. However, creating different gate stack structures on a single substrate may have severe process integration limitations especially when the difference in different threshold voltage Vt devices are around 100 mV.